An aspect of this invention relates to voltage controlled oscillators.
A Phase Locked Loop (PLL) is typically employed to generate timing signals, clock signals or carrier frequencies in communication systems and for timing recovery in receiving systems. FIGS. 1A and 1B show conventional PLLs 200 and 240. The PLLs 200 and 240 employ an active loop filter 202 and a passive loop filter 242 respectively. One of the key performance parameters of a PLL is xe2x80x9cphase noisexe2x80x9d. A large amount of phase noise may introduce timing variance and hence affect system performance. Therefore, minimizing the phase noise of a PLL is typically one of the design goals of a transceiver in a communication system.
There are many sources within a PLL system that can contribute to phase noise. In fact, every building block in a PLL contributes to phase noise in various degrees. Key contributors of phase noise include the Voltage Control Oscillator (VCO) and the associated circuits that generate the VCO control voltage such as the PLL loop filter. Charge pump based PLLs can be implemented with either an active or a passive filter. High-Q resonator based VCO""s are usually the topology of choice in applications that require low phase noise.
First, referring to FIG. 1C, consider the noise contribution from a VCO 280. We would initially assume that the VCO control voltage, VCTRL, is ideal and noise free. In an LC resonator based VCO such as VCO 280, the current source 282 and cross-coupled transistors 284 and 286 are the dominant VCO phase noise contributors. In particular, it MOSFET devices are used in the VCO implementation, the 1/f noise of these devices could increase the phase noise of the VCO significantly (by 2 to 6 dB). The noise contribution of, for example, the cross-coupled pair 284 and 286 and the current source 282 may translate into an equivalent noise voltage imposed across the varactor 288. This noise voltage modulates the effective value of the varactor capacitance 288 and hence may cause the VCO oscillating frequencies to change.
In addition to the contribution of PLL phase noise from the VCO 280, an active loop filter 202, as in PLL 200, can also contribute to the total PLL phase noise. Conventional PLL active filters include a positive input to which a bias voltage, Bias, is applied. The bias voltage generally has a fluctuating component and this disturbance will appear at the output of the opamp that is connected to the VCO control node. As a result, the voltage fluctuation or noise associated with the reference voltage will be impressed across the varactor of the VCO. This causes a fluctuation in the varactor capacitance value and results in a random modulation of the VCO oscillating frequency. The fluctuation in frequency may manifest itself as excessive phase noise.
A phase locked loop including a loop filter to generate a control voltage as a function of an input signal and a reference voltage. A voltage controlled oscillator a(VCO) coupled to the loop filter, includes a varactor having terminals. In response to the control voltage, the VCO generates a periodic output signal having a frequency that is a function of the varactor and the control voltage. This PLL configuration duplicates noise appearing on one of the varactor terminals to another of the varactor terminals so that noise in the periodic output signal is reduced.
The details of one or more embodiments of the invention are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the invention will be apparent from the description and drawings, and from the claims.
FIG. 1A is a block diagram of a conventional PLL having an active loop filter.
FIG. 1B is a block diagram of a conventional PLL having a passive loop filter.
FIG. 1C is a detailed schematic of a conventional VCO.
FIG. 2 is a block diagram of an aspect of a PLL.
FIG. 3 is a schematic diagram of a loop filter.
FIG. 4 is a block diagram of an aspect of a VCO.
FIG. 5 is a schematic diagram of an aspect of a VCO.
FIG. 6 a schematic diagram of another aspect of a VCO
FIG. 7 is a flow chart of an operation for generating a signal having a periodic waveform.